13th of September 2021, 11:30 – 14:30
Implications of New Semiconductor-Trends for IC-Packages
by Tanja Braun and Michael Töpper
Future electronic systems like autonomous systems using high-performance computing (HPC) and edge computing systems, sensor-integrated systems and bio-integrated devices will require more and more functions that cannot be managed by a single chip, even if advanced system on chip (SoC) concepts are used. In addition, a paradigm shift is taking place in many applications, in that data is progressively processed at a more localized level – from the cloud to the edge and down to the sensor node, thereby enabling meaningful information to be extracted, transmitted, stored or acted upon faster. 3D-stacking is also needed to realize smart sensor systems that aggregate a large amount of data and therefore have to be placed in close vicinity to the data processing, the data storage components and the transmission elements. Also, the increasingly higher costs for further node miniaturization in the IC manufacturing process will also promote the interconnection of chiplets. This means that intellectual property (IP) blocks made in different technology nodes will be combined on an interposer to reduce cost by increasing the production yield (smaller chips) and reuse across applications. In addition to the aforementioned approaches, optical intra-chip and intra-board communication need to be created in order to dramatically speed up communication and to significantly lower energy consumption
Therefore heterogeneous integration will appear at the chip package and organic substrate or panel level which will be discussed in this PDC.
Outline
- Introduction to new IC trends
- Implications for Wafer Level Packaging
- Implications for Panel Level Packaging
- Summary
Target audience
R&D Engineers and Decision Makers of the Semiconductor Industry for Advanced Packages
Dr. Tanja Braun
Tanja Braun studied mechanical engineering at the Technical University of Berlin with a focus on polymers and microsystems and joined Fraunhofer IZM in 1999. In 2013 she received her Dr. degree from the Technical University of Berlin for the work focusing on humidity diffusion through particle-filled epoxy resins. Tanja Braun is head of the group Assembly & Encapsulation Technologies. Recent research is focused on the fan-out wafer and panel-level packaging technologies and Tanja Braun is leading the Fan-out Panel Level Packaging Consortium at Fraunhofer IZM Berlin
More about Tanja
Results of her research concerning packaging for advanced packages have been presented at multiple international conferences. Tanja Braun holds also several patents in the field of advanced packaging.
Tanja Braun is an active member of IEEE. She is member of the IEEE EPS Board of Governor (BOG) and serves as Region 8 Program Direc-tor as well as the IEEE EPS Women in Engineering (WIE) delegate.
Dr. Michael Töpper
Michael Töpper has a M.S. degree in Chemistry and a PhD in Material Science. Since 1994 he is with the Packaging Research Team at TU Berlin and Fraunhofer IZM. In 1997 he became head of a research group. In 2006 he was also a Research Associate Professor of Electrical and Computer Engineering at the University of Utah, Salt Lake City.
More about Micheal
The focus of his work was Wafer Level Packaging applications with a focus on materials. Since 2015 he is part of the business development team at Fraunhofer IZM. Michael Töpper is a Senior Member of IEEE-EPS and has received the European Semi-Award in 2007 for WLP. He has published several book chapters and is author and co-author of over 250 publications.
13th of September 2021, 15:00 – 18:00
Achieving High Reliability of Lead-Free Solder Joints – Materials Considerations
Ning-Cheng Lee
Vice President of Technology of Indium Corporation, USA
This course covers the detailed material considerations required for achieving high reliability for lead-free solder joints. The reliability discussed includes joint mechanical properties, development of type and extent of intermetallic compounds (IMC) under a variety of material combinations and aging conditions, and how those IMCs affect the reliability. The failure modes, thermal cycling reliability, and fragility of solder joints as a function of material combination, thermal history, and stress history will be addressed in details. The selection of novel alloys with reduced fragility will be presented. Crucial parameters for high reliability solder alloy for automotive industry will be presented. Electromigration, and tin whisker growth will also be discussed. The emphasis of this course is placed on the understanding of how the various factors contribute to the failure modes, and how the selection of proper solder alloys and surface finishes for achieving high reliability are key.
Outline
- Main stream lead-free soldering practices
- Surface finishes issues
- Mechanical properties
- Intermetallic compounds
- Failure modes
- Reliability – Thermal cycle
- Reliability – Fragility
- Reliability – Rigidity and ductility
- Reliability – Composite Solder Enable Hierarchy Assembly & Shock Resistance
- Reliability – Tin whisker
Target audience
Directors, managers, design engineers, process engineers, and reliability engineers who care about achieving high reliability lead-free solder joints and would like to know how to achieve it should take this course.
Ning-Cheng Lee
Ning-Cheng Lee is the Vice President of Technology of Indium Corporation. He has been with Indium since 1986. Prior to joining Indium, he was with Morton Chemical and SCM. He has more than 30 years of experience in the development of fluxes and solder materials for SMT industries. He received his PhD in polymer science from University of Akron in 1981, and BS in chemistry from National Taiwan University in 1973.
More about Ning-Cheng
Ning-Cheng is the author of “Reflow Soldering Processes and Troubleshooting: SMT, BGA, CSP, and Flip Chip Technologies” by Newnes, and co-author of 5 other books. He received 1991 award from SMT Magazine and 1993 and 2001 awards for best proceedings papers of SMI or SMTA International Conferences, 2003 Lead Free Co-Operation Award from Soldertec, 2008 and 2014 awards from IPC for Honorable Mention Paper – USA Award of APEX conference, and 2010 Best Paper Award of SMTA China South Conference. He was honored as 2002 Member of Distinction from SMTA, 2006 Exceptional Technical Achievement Award from CPMT, 2007 Distinguished Lecturer from CPMT, 2009 Distinguished Author from SMTA, 2010 Electronics Manufacturing Technology Award from CPMT, 2015 Founder’s Award from SMTA, and 2017 IEEE Fellow.